Hi, I'm Taowei Huang

Developed an autonomous F1-Tenth mapping system utilizing SLAM and a custom path-planning heuristic to generate high-fidelity indoor maps with sub-centimeter localization accuracy.

Implemented a U-Net architecture in PyTorch for vehicle detection in urban traffic feeds, achieving a 0.7 Intersection Over Union (IoU) by employing gradient clipping, dropout, and data augmentation to ensure robust generalization.

Designed a System-on-Chip puzzle game on a Spartan-7 FPGA, integrating a MicroBlaze microprocessor with custom SystemVerilog interfaces for USB and HDMI while utilizing AXI4 for efficient memory communication.

Designed a Unix-like operating system in C and RISC-V assembly, implementing SV39 virtual memory, multi-processing capabilities, and a custom ELF loader to support user-space binary execution.

Implemented a 16-bit LC3 soft-core processor in SystemVerilog, featuring a custom ALU and memory-mapped I/O to execute the complete instruction set architecture on FPGA hardware.

Designed, implemented and soldered circuits for a nationially competitive battle robot.